Analog Devices UG-442 Manual de usuario

Evaluation Board User Guide

UG-442

One Technology Way •P. O. Box 9106 •Norwood, MA 02062-9106, U.S.A. •Tel: 781.329.4700 •Fax: 781.461.3113 •www.analog.com

Evaluating the AD5422 Single Channel, 16-Bit, Current Source and Voltage Output

DAC, HART Connectivity

PLEASE SEE THE LAST PAGE FOR AN IMPORTANT

WARNING AND LEGAL TERMS AND CONDITIONS. Rev. C | Page 1 of 16

FEATURES

Full-featured evaluation board for the AD5422

On-board reference

Link options

Direct hook-up to USB port of PC

PC software for control

EVALUATION BOARD DESCRIPTION

The EVAL-AD5422 is a full-featured evaluation board that is

designed to allow the user to easily evaluate all features of the

16-bit AD5422 current source and voltage output digital-to-

analog converter (DAC). All of the AD5422 pins are accessible

at on-board connectors for external connection. The board can

be controlled by two means, via the on-board connector (J8) or via

the USB port of a Windows® 2000-, NT®-, XP®-based PC using the

AD5422 evaluation software. The default setup is for control via

the USB port.

Two separate packages exist for the AD5422 (24-lead TSSOP and

40-lead LFCSP); therefore, two corresponding evaluation boards

are available.

DEVICE DESCRIPTION

The AD5422 is a low cost, precision, fully integrated 16-bit

converter, offering a programmable current source and

programmable voltage output designed to meet the requirements

of industrial process control applications. The output current

range is programmable to 4 mA to 20 mA, 0 mA to 20 mA, or an

overrange function of 0 mA to 24 mA. The voltage output is

provided from a separate pin that can be configured to provide

0 V to 5 V, 0 V to 10 V, ±5 V or ±10 V output ranges; an overrange

of 10% is available for all ranges. Analog outputs are short- and

open-circuit protected and can drive capacitive loads of 1 μF. The

device is specified to operate with a power supply range from

10.8 V to 40 V. The output loop compliance is 0 V to AVDD − 2.5 V.

Complete specifications for the AD5422 are available in the

AD5422 data sheet and should be consulted in conjunction

with this document when using the evaluation board.

FUNCTIONAL BLOCK DIAGRAM

USB

CONNECTOR

POWER SUPPLY INPUTS

HEADER (J8)

CONTROLLER

CY7C68013A

SELECT ADC

REFIN

INPUT/

OUTPUT

REFOUT

AD5422

VOLTAGE

REFERENCE

EXT REF

ITOV

VOUT

IOUT

08230-001

Figure 1.

UG-442 Evaluation Board User Guide

Rev. C | Page 2 of 16

TABLE OF CONTENTS

Features .............................................................................................. 1

Evaluation Board Description......................................................... 1

Device Description........................................................................... 1

Functional Block Diagram .............................................................. 1

Revision History ............................................................................... 2

Evaluation Board Hardware ............................................................ 3

Power Supplies .............................................................................. 3

Link Options ..................................................................................3

Evaluation Board Software...............................................................6

Software Installation .....................................................................6

Software Operation .......................................................................6

Evaluation Board Schematics and Artwork...................................8

Ordering Information.................................................................... 14

Bill of Materials........................................................................... 14

REVISION HISTORY

10/13—Rev. B to Rev. C

Change to Figure 6 ........................................................................... 9

Change to Figure 8 ......................................................................... 11

Changes to C3, Supplier/Number Column, Table 5 .................. 14

3/13—Rev. A to Rev. B

Change to Control Register Section and Added Figure 4;

Renumbered Sequentially................................................................ 7

7/12—Rev. 0 to Re v. A

Document Title Changed from E VA L -AD5422 to

UG-442.................................................................................Universal

Changes to Evaluation Board Description Section...................... 1

Changes to Figure 3.......................................................................... 6

Changes to Figure 4.......................................................................... 8

Changes to Figure 5.......................................................................... 9

Inserted Figure 6; Renumbered Sequentially.............................. 10

Inserted Figure 7............................................................................. 11

Changes to Figure 8 to Figure 10.................................................. 12

Inserted Figure 11 to Figure 13..................................................... 13

4/09—Revision 0: Initial Version

Evaluation Board User Guide UG-442

Rev. C | Page 3 of 16

EVALUATION BOARD HARDWARE

POWER SUPPLIES

The following external supplies must be provided:

•5 V between the 5 V and 0 V inputs for the digital supply

of the AD5422 and digital circuitry. Alternatively, place

LK6 in Position A to power the digital circuitry from the

USB port (default).

•10.8 V to 40 V between the AVDD and GND inputs for the

analog supply of the AD5422.

•0 V to −26.4 V between the AVSS and GND inputs for the

negative analog supply of the AD5422. (This is only required

if a bipolar output voltage range is programmed; otherwise,

the negative supply of the AD5422 can be connected to

GND by placing LK4 in Position A.)

•10.8 V to 16.5 V between the V+ and GND inputs for the

analog supply of the AD7321 (on-board analog-to-digital

converter [ADC]) and ADR435 (on-board voltage reference).

If the analog supply connected to the AVDD input is less than

16.5 V, the AD7321 and ADR435 can be powered from this

by placing LK9 in Position A, and the V+ input can be left

unconnected.

•0 V to −16.5 V between the V− and GND inputs for the

negative analog supply of the AD7321 (on-board ADC). If

the negative analog supply connected to the AVSS input is

less than (magnitude) −16.5 V, the AD7321 can be powered

from this by placing LK16 in Position A, and the V− input

can be left unconnected.

The analog and digital planes are connected at one location, close

to the AD5422. It is recommended not to connect GND and

DGND elsewhere in the system to avoid ground loop problems.

Each supply is decoupled to the relevant ground plane with 10 µF

and 0.1 µF capacitors. Each device supply pin is again decoupled

with a 10 µF and 0.1 µF capacitor pair to the relevant ground plane.

Excessive Power Supply

If a power supply in excess of 16.5 V is connected to the AVDD

input, LK9 must be in Position B to prevent potential damage to the

5 V voltage reference and to the ADC (see U2 and U6, respectively,

in Figure 6). However, if a power supply in excess of −16.5 V is to

be connected to the AVSS input, LK16 must be in Position B to

prevent potential damage to the ADC.

LINK OPTIONS

The position of LK7 configures the board for either PC control via

the USB port (default setup) or for control by an external source

via J8. Set the link options on the evaluation board for the required

operating setup before using the board. The functions of the link

options are described in Table 4.

Default Link Option Setup

The default setup is for control by the PC via the USB port. The

default link options are listed in Table 1.

Table 1. Link and Switch Options for PC Control

Link No. Option

LK1 A

LK2 A

LK3 Inserted

LK4 B

LK5 B

LK6 A

LK7 A

LK8 A

LK9

LK10 Inserted

LK11 Inserted

LK12 Inserted

LK13 Inserted

LK14 Inserted

LK15

LK16 A

LK17 Inserted

LK18 Inserted

Connector J8 Pin Descriptions

Table 2. Connector J8 Pin Configuration1

2 4 6 8 10

1 3 5 7 9

1LK7 must be in Position B to enable the use of J8.

Table 3. Connector J8 Pin Descriptions

Connector J8 Pin No. Function

1 SDO

2 CLEAR SELECT

3 DGND

4 CLEAR

5 DGND

6 FAULT

7 SDIN

DGND

9 SCLK

10 LATCH

UG-442 Evaluation Board User Guide

Rev. C | Page 4 of 16

Table 4. Link Options

Link No. Description

LK1 This link selects the state of the CLEAR SELECT pin (when the evaluation board is configured for external control).

Position A ties the CLEAR SELECT pin to 0 V.

Position B ties the CLEAR SELECT pin to DVCC.

LK2 This link selects the state of the CLEAR pin (when the evaluation board is configured for external control).

Position A ties the CLEAR pin to 0 V.

Position B ties the CLEAR pin to DVCC.

LK3 This link selects the state of the DVCC SELECT pin.

When inserted, the DVCC SELECT pin is tied to 0 V, disabling the internal supply; an external supply must be connected to the

DVCC pin via LK17.

When removed, the DV

SELECT pin is unconnected, enabling the internal supply. Removing LK3 eliminates the need for an

external digital supply; therefore, LK17 can also be removed.

LK4 This link selects the negative supply voltage for AVSS.

Position A selects 0 V as the negative supply voltage (unipolar voltage output operation).

Position B selects the AVSS connection of J2 as the negative supply voltage (bipolar voltage output operation).

LK5 This link selects how the IOUT current loop return is connected to ground on the evaluation board.

Position A connects the I

OUT

current loop return directly to ground.

Position B connects the IOUT current loop return input to GND through a 51 Ω resistor. The high side of the resistor is

connected to the VIN1 input of the on-board ADC (AD7321), allowing readback to the PC of the output current.

LK6

This link selects the 5 V power supply source for the digital circuitry.

Position A selects the USB port as the 5 V digital circuitry power supply source.

Position B selects J7 as the 5 V digital circuitry power supply source.

LK7 This link selects whether the AD5422 evaluation board is controlled by the PC via the USB port or by an external source via J8.

Position A selects the evaluation board to be controlled by the PC via the USB port.

Position B selects the evaluation board to be controlled by an external source via J8.

LK8 This link selects the digital supply voltage value for the AD5422 and the on-board ADC (U6).

Position A selects 5 V as the supply value.

Position B selects 3.3 V as the supply value.

LK9 This link selects the positive power supply source for U2 and U6.

Position A selects the AVDD input as the positive power supply source (use only if the power supply applied to AVDD is less

than 16.5 V).

Position B selects the V+ input as the positive power supply source (use if the power supply applied to AVDD input is greater

than 16.5 V). A power supply voltage of 10.8 V to 16.5 V can be applied to V+.

LK10 This link is used to enable/disable the external boost transistor.

When this link is inserted, the external boost transistor is disabled.

When this link is removed, the external boost transistor is enabled.

LK11 This link connects the −VSENSE input to ground.

When this link is inserted, the −VSENSE input is connected directly to ground.

When this link is removed, the −V

SENSE

input is left floating and should be connected to the low side of the load resistance

external to the evaluation board.

LK12 This link connects the +VSENSE input to VOUT.

When this link is inserted, the +V

SENSE

input is connected directly to the V

OUT

pin.

When this link is removed, the +VSENSE input is connected to VOUT through a 47 kΩ resistance (to prevent the integrated

voltage amplifier loop from opening).

LK13

This link connects the I

OUT

connector directly to the GND connector.

When this link is inserted, the IOUT connector is connected directly to the GND connector.

When this link is removed, the IOUT connector is disconnected from the GND connector (an external load must be connected).

LK14 This link connects the VOUT output of the AD5422 to the VIN0 input of the on-board ADC (AD7321).

When this link is inserted, the voltage at the VOUT pin can be read back to the PC.

When this link is removed, the voltage at the VOUT pin is disconnected from the on-board ADC input.

Evaluation Board User Guide UG-442

Rev. C | Page 5 of 16

Link No. Description

LK15 This link selects the voltage reference source.

Position A selects the internal voltage reference of the AD5422 as the voltage reference source.

Position B selects an external source that can be applied at Connector J3.

Position C selects the on-board ADR435 as the voltage reference source.

LK16 This link selects the negative power supply source for U6.

Position A selects the AVSS input as the negative power supply source (use only if the power supply applied to AVSS input is

less (in magnitude) than −16.5 V).

Position B selects the V− input as the negative power supply source (use only if the power supply applied to AV

input is

greater (in magnitude) than −16.5 V).

LK17 This link connects the DVCC pin of the AD5422 to the on-board digital power supply.

When this link is inserted, the DVCC pin of the AD5422 is connected to the on-board digital power supply (LK3 must be

inserted to disable the AD5422 internal digital power supply).

When this link is removed, the DVCC pin of the AD5422 is disconnected from the on-board digital power supply (LK3 should

be removed to enable the AD5420 internal digital power supply).

LK18 This link connects the AVDD pin of the AD5422 to the power supply applied at the AVDD input connector, J2 (LK18 must be

inserted for operation of the AD5422).

UG-442 Evaluation Board User Guide

Rev. C | Page 6 of 16

EVALUATION BOARD SOFTWARE

SOFTWARE INSTALLATION

The AD5422 evaluation kit includes self-installing software on a

CD. The software is compatible with Windows 2000/NT/XP. If

the setup file does not run automatically, run the setup.exe file

from the CD.

To install the evaluation software, do the following:

1. Install the evaluation software before connecting the

evaluation board to the USB port of the PC to ensure that

the evaluation board is correctly recognized when connected

to the PC.

2. After installation from the CD is complete, power up the

AD5422 evaluation board as described in the Power Supplies

section.

3. Connect the board to the USB port of the PC using the

supplied cable.

4. When the evaluation board is detected, proceed through

any dialog boxes that appear. This finishes the installation.

SOFTWARE OPERATION

To launch the software, complete the following steps:

1. From the Start menu, select Analog Devices – AD5422/

AD5422 Evaluation Software. The main window of the

software then displays (see Figure 3).

2. If the evaluation board is not connected to the USB port when

the software is launched, a connectivity error is displayed

(see Figure 2). Simply connect the evaluation board to the

USB port of the PC and click Retry.

08230-002

Figure 2. Connectivity Error Alert

08230-003

Figure 3. Main Window

Evaluation Board User Guide UG-442

Rev. C | Page 7 of 16

The main window is divided into eight sections: Input Register,

Status Register, Control Register, Reset Register, Clear/Clear

Select Pins, Read/Write Registers, Measure Output Voltage/

Current, and Program Voltage/Current.

Input Register

The Input Register section displays the contents of the input

write operation is requested via the main window controls. It

allows users to associate the value written to the AD5422 with

the various programmable functions.

Status Register

The Status Register section displays the states of the three bits

of the read-only status register. To read the register, click the

Read Status Register button.

Control Register

The Control Register section facilitates programming of the

control register on an individual bit basis. To change the value

for a bit, click the relevant button. Each button also displays the

current state of the bit. You can also enter code in the SR CLOCK

and SR STEP text boxes and select an output range from the

OUTPUT RANGE drop-down box.

When using an external current setting resistor, it is recom-

mended to only set REXT when also setting the OUTEN bit.

Alternately, REXT can be set before the OUTEN bit is set, but

the range must be changed on the write in which the output is

enabled. The Read/Write Registers section should be used for

these commands (see Figure 4).

Reset Register

The sole function of the Reset Register section is to allow the

AD5422 to be reset to its power-on state. To change the value of

the reset bit, click the RESET button.

Clear Pin

In the Clear/Clear Select Pins section, you can change the state

of the CLEAR pin by clicking the CLEAR button. Likewise, you

can change the state of the CLEAR SELECT pin by clicking the

CLEAR SELECT button.

Read/Write Registers

In the Read/Write Registers section, you can read from and write

to all registers in the AD5422. To select a register and request a

read or write, click the Select Control Function drop-down

box. Then, to write data to the register, select the desired data

from the Data Write drop-down box and then click OK. Register

data is updated and displayed for you to read in the Data Read

text box each time you click OK.

Measure Output Voltage/Current

To display the programmed output current in the Measure Output

Current section, click the Measure output Current button. The

output current is measured using the on-board ADC and is

displayed in milliamperes in the VOUT or IOUT box. The output

current is measured with an accuracy of approximately 1% and is

therefore not intended as precise, but rather is an approximate

feedback of the programmed value.

Program Current

To program a voltage or current output value, enter the value in

either volts or milliamperes (mA) in the Enter Value text box of

the Program Voltage/Current section, and press Enter. The

output must first be enabled, and the output range must be

selected via the Control Register section.

08230-300

POWER-ON

SOFTWARE RESET

CONTROL REGISTER WRITE (ONE WRITE COMMAND)

• SELECT RSET EXTERNAL/INTERNAL

• SET THE REQUIRED RANGE

• CONFIGURE THE SLEW RATE CONTROL (IF REQUIRED)

• CONFIGURE DAISY CHAIN MODE (IF REQUIRED)

• ENABLE THE OUTPUT

DATA REGISTER WRITE

• WRITE REQUIRED CODE TO DATA REGISTER

CONTROL REGISTER WRITE

• DISABLE OUTPUT

RSET CONFIGURATION CHANGE RANGE CHANGE

Figure 4. Programming Sequence to Write/Enable the Output Correctly

UG-442 Evaluation Board User Guide

Rev. C | Page 8 of 16

EVALUATION BOARD SCHEMATICS AND ARTWORK

08230-004

SDO

CLEAR_SELECT

CLEAR

FAULT

SDIN

SCLK

LATCH

DGND

+5V

RED

R17

100kΩ

C29

0.1µF

C33

22pF

C32

22pF

VBUS 2

D– 3

D+ 4

IO 5

GND

SHIELD

USB-MINI-B

R22

10kΩ

R16

100kΩ

R18

0Ω

C30

0.1µF

C21

0.1µF

C22

0.1µF

C23

0.1µF

C24

0.1µF

C25

0.1µF

C26

0.1µF

C27

0.1µF

24 MHz

C20 0.1µF

8IN1

7IN2

5SD

GND

OUT1 2

OUT2 6

ERROR 3

ADP3303-3.3

R23

1kΩ

C18

0.1µF

R20

10kΩ

R19

10kΩ

R21

10kΩ

R24

2.2kΩ

R25

2.2kΩ

C34

0.1µF

A0 2

A1 3

A2 4

VSS

5SDA

6SCL

7WP

8VCC

24LC64

PD5/FD13 51

PD6/FD14 52

PD7/FD15

54 CLKOUT

1RDY0/*SLRD

2RDY1/*SLWR 4

XTALOUT 5

XTALIN

8D+

9D–

13 IFCLK

14 RSVD

SCL

SDA

PB0/FD0 19

PB1/FD1 20

PB2/FD2 21

PB3/FD3

PD4/FD12

PD3/FD11

PD2/FD10

PD1/FD9

PD0/FD8

44 *WAKEUP

42 RESET

40 PA7/*FLD/SLCS

39 PA6/*PKTEND

38 PA5/FIFOADR1

37 PA4/FIFOADR0

36 PA3/*WU2

35 PA2/*SLOE

34 PA1/INT1

33 PA0/INT0

CTL2/*FLAGC

CTL1/*FLAGB

CTL0/*FLAGA

PB7/FD7

PB6/FD6

PB5/FD5

PB4/FD4

AVCC

VCC 11

VCC 17

VCC 27

VCC 32

VCC 43

VCC 55

VCC

6AGND

10 GND

12 GND

26 GND

28 GND

41 GND

53 GND

56 GND

CY7C68013-CSP

C31

2.2µF

+C19

10µF

20%

2S1A

S1B

5S2A

S2B

GND

S3B

11 S3A12

S4B

14 S4A

16 VDD

ADG774

2S1A

S1B

5S2A

S2B

GND

S3B

11 S3A12

S4B

14 S4A

16 VDD

ADG774

A B

LK7

J8-1

J8-2

J8-3

J8-4

J8-5

J8-6

J8-7

J8-8

J8-9

J8-10

J7-1

J7-2 C55

0.1µF

+C56

10µF

LK8

C57

0.1µF

A B

LK1

A B

LK2

A B

LK6

C28

0.1µF

3.3V

3.3V3.3V

3.3V

PA3

PA2

CS_ADC

USB_POWER

3.3V

3.3V 3.3V

3.3V

PGND

PGNDPGNDPGND

PGND

PGNDPGND

PGND

LATCH

SCLK

SDIN

FAULT

CLEAR

CLEAR_SELECT

SDO

DVCC

PA5

PA6

PA7

PA3

PA2

FD7

DOUT_ADC

FD7

PA5

PA6

PA7

PGND DGND

DGND

DGND DGND

SDIN_ADC

SCLK_ADC

PGND

DVCC

DGND

FD8

EXT_5V DVCC

PGND

Figure 5. AD5422 TSSOP Evaluation Board Schematic of the Controller Circuitry

Evaluation Board User Guide UG-442

Rev. C | Page 9 of 16

08230-005

SOCKETED

REFIN

C4,C5,C8,C9 MUST BE RATED OVER 60V

C6,C7,C10,C11 MUST BE RATED OVER 30V

THE FOLLOWING COMPONENTS ARE NOT TO BE POPULATED :

C12, C14, C17, C52, C53, R27

RED

SOCKETED

LK3

LK4

J2-1

J2-2

J2-3

C1 4nF

R1 15kΩ

10kΩ

J4-1

J4-2

J4-3

R21kΩ

LK10

J5-1

J5-2

LK11

LK12

22nF

+C5

10µF

20%

0.1µF

C10

0.1µF

C13 0.1µF

C15

0.1µF

+C16

1µF

20%

R4 0Ω

R5 0Ω

R6 0Ω

R7 0Ω

R8 0Ω

R9 0Ω

R10 0Ω

TP1 TP2 TP3 TP4 TP5 TP6 TP7

C12

C14

C17

R11

51Ω

C35 0.1µF

C36 10µF

20%

LK5

LK13

LK14

J6-1

J6-2

+C37

10µF

20%

+C38

10µF

20%

C39

0.1µF

C40

0.1µF

2+VIN

5TRIM

VOUT

GND

ADR435

LK15

C41

0.1µF

+C42

10µF

20%

LK9

1CS

2DIN

3DGND

4AGND

REFIN/OUT

6VSS

VIN0

VIN1

VDD

VCC

11 VDRIVE

12 DOUT

13 DGND

14 SCLK

AD7321

LK16

C43 0.1µF

C44 0.1µF

C45 10µF

20%

C46 10µF

20%

TP8

TP9

TP10

TP11

–

4V–

7V+

AD820

R12

5.6kΩ

R13 39kΩ

C47

0.1µF

C48 0.1µF

C49 10µF

20%

+C50

10µF 20%

C51 680nF

R14

10kΩ

R15

4.7kΩ

J9-1

J10-1

J11-1

J12-1

J13-1

LK17

R26

1kΩ

R27

LK18

+C9

10µF

20%

0.1µF

10µF

C11

10µF

AVSS

DVCC

3FAULT

5CLEAR_SELECT

6CLEAR

7LATCH

8SCLK

9SDIN

10 SDO

GND

RSET

REFOUT

REFIN

16 DVCC_SELECT

CCOMP1 18

CCOMP2

IOUT

BOOST

VOUT

+VSENSE

–VSENSE

AVDD

GND

AD5422_TSSOP

CLAMP-SOIC-TSSOP

FAULT

CLEAR_SELECT

CLEAR

LATCH

SCLK

SDIN

SDO

AVSS

AVDD

DVCC

AVDD

DVCC

DGND

DVCC

VIN0

V+

V–

AVDD

V+

VIN0

CS_ADC

SDIN_ADC

SCLK_ADC

DOUT_ADC

DGND

AVSS

V–

DGND AVSS

+VSENSE

VOUT

–VSENSE

IOUT

GND

V+

V–

AVDD

AVSS

AGND

NOTES

1. PIN 18 IS LISTED AS NC IN THE AD5422 DATA SHEET AND CCOMP2 IN THIS SCHEMATIC. CONNECTING THE COMPENSATION CAPACITOR BETWEEN

PIN 17 AND PIN 18 OR PIN 17 AND PIN 21 HAS THE SAME EFFECT. NEW DESIGNS MUST FOLLOW THE AD5422 DATA SHEET RECOMMENDATIONS OF

INSERTING THE COMPENSATION CAPACITOR BETWEEN C

COMP

AND V

OUT

Figure 6. AD5422 TSSOP Evaluation Board Schematic of the AD5422Circuitry

UG-442 Evaluation Board User Guide

Rev. C | Page 10 of 16

SDO

CLEAR_SELECT

CLEAR

FAULT

SDIN

SCLK

LATCH

DGND

+5V

RED R17

100kΩ

C29

0.1µF

C33

22pF

C32

22pF

VBUS 2

D- 3

D+ 4

IO 5

GND

SHIELD SHIELD

USB-MINI-B

R22

10kΩ

R16

100kΩ

R18

0Ω

C30

0.1µF

C21

0.1µF

C22

0.1µF

C23

0.1µF

C24

0.1µF

C25

0.1µF

C26

0.1µF

C27

0.1µF

24 MHz

C20 0.1µF

8IN1

7IN2

5SD

GND

OUT1 2

OUT2 6

ERROR 3

ADP3303-3.3

R23

1kΩ

C18

0.1µF

R20

10kΩ

R19

10kΩ

R21

10kΩ

R24

2.2kΩ

R25

2.2kΩ

C34

0.1µF

A0 2

A1 3

A2 4

VSS

5SDA

6SCL

7WP

8VCC

24LC64

PD5/FD13 51

PD6/FD14 52

PD7/FD15

54 CLKOUT

1RDY0/*SLRD

2RDY1/*SLWR 4

XTALOUT 5

XTALIN

8D+

9D-

13 IFCLK

14 RSVD

SCL 16

SDA

PB0/FD0 19

PB1/FD1 20

PB2/FD2 21

PB3/FD3

PD4/FD12 48

PD3/FD11 47

PD2/FD10 46

PD1/FD9 45

PD0/FD8

44 *WAKEUP

42 RESET

40 PA7/*FLD/SLCS

39 PA6/*PKTEND

38 PA5/FIFOADR1

37 PA4/FIFOADR0

36 PA3/*WU2

35 PA2/*SLOE

34 PA1/INT1

33 PA0/INT0

CTL2/*FLAGC 30

CTL1/*FLAGB 29

CTL0/*FLAGA

PB7/FD7 24

PB6/FD6 23

PB5/FD5 22

PB4/FD4

AVCC

VCC 11

VCC 17

VCC 27

VCC 32

VCC 43

VCC 55

VCC

6AGND

10 GND

12 GND

26 GND

28 GND

41 GND

53 GND

56 GND

CY7C68013-CSP

C31

2.2µF

+C19

10µF

20%

2S1A

S1B

5S2A

S2B

GND

S3B

11 S3A 12

S4B

14 S4A

16 VDD

ADG774

2S1A

S1B

5S2A

S2B

GND

S3B

11 S3A 12

S4B

14 S4A

16 VDD

ADG774

LK7

J8-1

J8-2

J8-3

J8-4

J8-5

J8-6

J8-7

J8-8

J8-9

J8-10

J7-1

J7-2 C55

0.1µF

+C56

10µF

LK8

C57

0.1µF

A B

LK1

A B

LK2

A B

LK6

C28

0.1µF

3.3V

3.3V3.3V

3.3V

PA3

PA2

CS_ADC

USB_POWER

3.3V

3.3V 3.3V

3.3V

PGND

PGNDPGND

PGND

PGNDPGND

PGND

LATCH

SCLK

SDIN

FAULT

CLEAR

CLEAR_SELECT

SDO

DVCC

PA5

PA6

PA7

PA3

PA2

FD7

DOUT_ADC

FD7

PA5

PA6

PA7

PGND DGND

DGND

DGND DGND

SDIN_ADC

SCLK_ADC

PGND

DVCC

DGND DGND

FD8

EXT_5V DVCC

PGND

08230-006

Figure 7. AD5422 LFCSP Evaluation Board Schematic of the Controller Circuitry

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