Analog Devices ADPA1107-EVALZ Manual de usuario

ADPA1107-EVALZ User Guide

UG-1962

One Technology Way •P.O. Box 9106 •Norwood, MA 02062-9106, U.S.A. •Tel: 781.329.4700 •Fax: 781.461.3113 •www.analog.com

Evaluating the ADPA110745 dBm (35 W), GaN Power Amplifier, 4.8 GHz to 6.0 GHz

PLEASE SEE THE LAST PAGE FOR AN IMPORTANT

WARNING AND LEGAL TERMS AND CONDITIONS.Rev. 0 | Page 1 of 14

FEATURES

2-layer Rogers 4350B evaluation board with heat spreader

End launch 2.92 mm (K) jack RF connectors

Through calibration path

Drain or gate pulsing capability

EVALUATION KIT CONTENTS

ADPA1107-EVALZ evaluation board

30 V drain pulser board

EQUIPMENT NEEDED

Pulse generator

Oscilloscope

28 V, 3 A power supply

−4 V power supply

Tektronix TCPA312A current probe

Tektronix TCPA300 current probe amplifier

RF signal generator

Directional coupler

RF power sensor

RF power meter

RF attenuator

DOCUMENTS NEEDED

ADPA1107 data sheet

GENERAL DESCRIPTION

The ADPA1107-E VA L Z consists of a 2-layer printed circuit

board (PCB) fabricated from a 10 mil thick, Rogers 4350B

copper clad mounted to an aluminum heat spreader. The heat

spreader assists in providing thermal relief to the device as well

as mechanical support to the PCB. Mounting holes on the heat

spreader allow the spreader to be attached to a heat sink.

Alternatively, the spreader can be clamped to a hot and cold

plate. The RFIN and RFOUT ports on the ADPA1107-E VA L Z

are populated by 2.92 mm (K) female coaxial connectors, and

the respective RF traces have a 50 Ω characteristic impedance. The

ADPA1107-EVAL Z is populated with components suitable for

use over the entire operating temperature range of the device. To

calibrate board trace losses, a through calibration path is

provided between the J6 and J5 connectors. J6 and J5 must be

populated with 2.92 mm (K) female coaxial connectors to use

the through calibration path.

The ground, power, gate control, and detector output voltage

are provided through two test points (TP1 and TP2) and two

24-pin headers (J3 and J4) on the ADPA1107-EVALZ. The

pinouts for these four headers are detailed in Table 1.

RF traces on the ADPA1107-EVAL Z are 50 Ω, grounded, coplanar

waveguide. The package ground leads and the exposed pad

connect directly to the ground plane. Multiple vias connect the

top and bottom ground planes with particular focus on the area

directly beneath the ground pad to provide adequate electrical

conduction and thermal conduction to the heat spreader.

The ADPA1107-EVALZ ships with a drain pulsing board

(pulser board) that can be plugged into the ADPA1107-EVA L Z

headers and configured to control the biasing of the ADPA1107

by providing a negative gate voltage and a control signal that

connects and disconnects the drain voltage to the ADPA1107-

EVA L Z . The ADPA1107-EVALZ can also operate alone in gate

pulsed mode where a negative pulse is applied to the VGG1 pin

of the ADPA1107.

For full details on the ADPA1107, see the ADPA1107 data

sheet, which must be consulted in conjunction with this user

guide when using the ADPA1107-EVA L Z .

UG-1962 ADPA1107-EVALZ User Guide

Rev. 0 | Page 2 of 14

TABLE OF CONTENTS

Features .............................................................................................. 1

Evaluation Kit Contents................................................................... 1

Equipment Needed........................................................................... 1

Documents Needed.......................................................................... 1

General Description......................................................................... 1

Revision History ............................................................................... 2

Evaluation Board Photographs....................................................... 3

Header Pinout ................................................................................... 4

Insertion Loss of the Through Calibration Path .......................... 5

Operating the ADPA1107-EVALZ with a Pulsed Gate Voltage. 6

Setup............................................................................................... 6

Operation .......................................................................................6

Operating the ADPA1107-EVALZ with the Drain Bias Pulser

Board...................................................................................................7

Setup................................................................................................9

Operation .......................................................................................9

Making Average to Pulsed Approximations ............................... 11

Evaluation Board Schematic and Artwork.................................. 12

Ordering Information.................................................................... 14

Bill of Materials........................................................................... 14

REVISION HISTORY

6/2021—Revision 0: Initial Version

ADPA1107-EVALZ User Guide UG-1962

Rev. 0 | Page 3 of 14

EVALUATION BOARD PHOTOGRAPHS

26242-001

Figure 1. ADPA1107-EVALZ Evaluation Board, Primary Side

26242-002

Figure 2. ADPA1107-EVALZ Evaluation Board, Secondary Side

UG-1962 ADPA1107-EVALZ User Guide

Rev. 0 | Page 4 of 14

HEADER PINOUT

The schematic for the ADPA1107-EVA L Z is shown in Figure 6.

The ADPA1107-EVA L Z contains four headers, TP1, TP2, J3,

and J4. Table 1 describes the pinout of these headers.

Table 1. TP1, TP2 J3, and J4 Header Connections on the ADPA1107-EVALZ

Header Header Pin Number Header Pin Name

TP1 Not applicable VREF

TP2 Not applicable VDET

J3 1, 3, 5, 7, 9, 10, 11, 12, 13, 14, 15, 17, 19, 21, 22, 23, 24 GND

4, 16, 18 Not connected

8 VDD1

6 VDD2

2 VREF_BIAS

20 VG1

J4 1, 2, 3, 4, 5, 7, 9, 11, 12, 13, 14, 15, 16, 17, 19, 21, 23 GND

8, 10, 22 Not connected

6 VG1-1

VDD1-1

20 VDD2-1

24 VDET_BIAS

ADPA1107-EVALZ User Guide UG-1962

Rev. 0 | Page 5 of 14

INSERTION LOSS OF THE THROUGH CALIBRATION PATH

To calibrate board trace losses, a through calibration path is

provided between the J6 and J5 connectors. J6 and J5 must be

populated with 2.92 mm (K) connectors to use the through

calibration path. Figure 3 shows the insertion loss, input return

loss, and output return loss of the through calibration path.

Table 2 lists the insertion loss of the through calibration path vs.

frequency.

–30

INSERTION LOSS, INPUT RETURN LOSS, AND

OUTPUT RETURN LOSS (dB)

FREQUENCY (GHz)

4.6 6.2

6.0

5.8

5.6

5.45.2

5.0

4.8

–25

–20

–15

–10

–5

INSERTION LOSS

INPUT RETURN LOSS

OUTPUT RETURN LOSS

26242-003

Figure 3. Insertion Loss, Input Return Loss, and Output Return Loss of

Through Calibration Path vs. Frequency

Table 2. Insertion Loss of Through Calibration Path

Frequency (GHz) Insertion Loss (dB)

4.6 −0.35

4.8 −0.37

5.0 −0.37

5.2 −0.38

5.4 −0.39

5.6 −0.38

5.8 −0.38

6.0 −0.39

6.2 −0.38

UG-1962 ADPA1107-EVALZ User Guide

Rev. 0 | Page 6 of 14

OPERATING THE ADPA1107-EVALZ WITH A PULSED GATE VOLTAGE

Remove C4, the 1 F capacitor, to enable fast gate pulsing

and apply a negative voltage pulse to the VGG1 input of the

ADPA1107, while the voltage on the VDDxA/VDDxB pins

of the ADPA1107 is held constant.

SETUP

All power supply, ground, and control signals are applied to

the J3 and J4 headers of the ADPA1107-EVALZ. For this mode

of operation, pulse the gate voltage between −4 V (off) and

approximately −2.6 V (on) to set the quiescent current (IDQ) to

approximately 350 mA. The pulse width and duty cycle must be

approximately 100 µs and 10%, respectively.

OPERATION

Take the following steps to power-up:

1. Set VDDx/VDDx-1 (Pin 6 and Pin 8 of J3, and Pin 18 and

Pin 20 of J4) to 0 V.

2. Set VG1 (Pin 20 of J3) to off (VGG1 = −4 V).

3. Set supply voltage (VDD) to 28 V.

4. Turn on the gate voltage pulse (VGG1 pulsing between

−4 V and approximately −2.6 V).

5. Fine tune the pulse high voltage to achieve the desired IDQ

(nominally 350 mA) while maintaining the pulse off

voltage level at −4 V.

6. Apply the RF input signal.

Take the following steps to power-down:

1. Tur n of f t he RF sig nal.

2. Turn off the pulse to VGG1 (VGG1 = −4 V).

3. Set VDD to 0 V.

4. Increase the pulse to VGG1 to 0 V.

ADPA1107-EVALZ User Guide UG-1962

Rev. 0 | Page 7 of 14

OPERATING THE ADPA1107-EVALZ WITH THE DRAIN BIAS PULSER BOARD

The ADPA1107-EVALZ ships with a drain bias pulser board. A

block diagram of the pulser board is shown in Figure 4. The pulser

board has two primary components. The IRFZ48NSTRLPBF is

an 55 V/64 A, metal-oxide semiconductor field effect transistor

(MOSFET) that switches the drain voltage to the ADPA1107

on and off, and the MIC5021YN is a high-side, MOSFET, static

switch driver that controls the IRFZ48NSTRLPBF MOSFET.

The pulser board plugs into the J3 and J4 headers of ADPA1107-

EVALZ and can be configured to provide a pulsed drain voltage

and a negative gate control voltage to control the biasing of the

ADPA1107.

Table 3. J1 to J5, TP1 to TP4, P1, and P2 Pulser Board Connections to the ADPA1107

Header Header Pin Number Header Pin Name

J1 Not applicable VDD

J2 Not applicable SENSE

J3 Not applicable VG1

J4 Not applicable Pulse

J5 Not applicable PULSED_VDD

VREFBIAS Not applicable VREFBIAS

VREF Not applicable VREF

VDET Not applicable VDET

VDETBIAS Not applicable VDETBIAS

P1 1 VDET

2 VDET_BIAS

3, 5, 7, 9, 10, 11, 12, 13, 14, 15, 17, 19, 21, 22, 23, 24 GND

4, 6, 8 PULSED_VDD

16, 18, 20 VG1

P2 1, 2, 3, 4, 5, 7, 9 ,11, 12, 13, 14, 15, 16, 17, 19, 21 GND

6, 8, 10 VG1

18, 20, 22 PULSED_VDD

23 VREF

24 VREF_BIAS

UG-1962 ADPA1107-EVALZ User Guide

Rev. 0 | Page 8 of 14

26242-004

J3 VG1 J2 SENSE

0Ω

J1 VDD

C11

3300µF

+C10

100µF

+C3

180pF

100V

0.1µF

100V

10µF

100V

10µF

50V

10µF

50V

10µF

50V

MIC5021YN 8

NC 4 5

1VBOOST

GATE

SENSE–

SENSE+GND

INPUT

VDD

J4 PULSE

10µF

50V

VDD_DRVR

0.1µF

50V

IRFZ48NSTRLPBF

0Ω

SENSE

GND

PULSED_VDD

4700pF

1 3

GND

MBRB2535CTLT4G

1kΩ

P2 P2

VG1

VREF_BIAS

VREF

PULSED_VDD

1 2

GND GND

VREF

VREFBIAS

5015

GND GND

VDET

VG1

VDET_BIAS

PULSED_VDD

1 2

VDETBIAS

Figure 4. Analog Devices, Inc., Pulser Board Schematic

ADPA1107-EVALZ User Guide UG-1962

Rev. 0 | Page 9 of 14

SETUP

The connections required to use the ADPA1107-EVALZ with

the drain bias pulser board are shown in Figure 5. Before applying

any bias or signals, plug the pulser board into the ADPA1107-

EVALZ so that the P1 header connector of the pulser board

connects to the J3 header of the ADPA1107-EVALZ, and the

pulser board P2 header connects to the J4 header of the

ADPA1107-EVALZ. All external supply voltages and control

signals are applied to the pulser board through the J1 through

J4 connectors, which are listed in Table 3.

The gate control voltage applied to the J4 connector, passes

directly through the pulser board and drives the VGG1 pin of

the ADPA1107. Because the VDD and GND lines carry

currents up to 2 A, the use of heavy gauge twisted pair wires is

recommended to minimize voltage drops. To observe the pulsed

drain voltage (PULSED_VDD) that drives the VDDxA/VDDxB

pins of the ADPA1107, connect an oscilloscope to the J5 coaxial

connector on the pulser board.

Connect a digital pulse generator that can generate 0 V to 5 V

pulses with a pulse width of 100 μs and a duty cycle of 10% to the J4

connector.

To observe and measure the drain current and the RF output

power of the ADPA1107, use a current probe and a pulsed RF

power meter. If these methods are not available, make

approximations as described in the Making Average to Pulsed

Approximations section.

OPERATION

Take the following steps to power-up (unless otherwise stated,

all signals are applied to the pulser board):

1. Set the voltage on the J4 connector, PULSE, to 0 V.

2. Set the voltage on the J3 connector, VG1, to −4 V.

3. Set the voltage on the J1 connector, VDD, to 28 V.

4. Turn on the J4 connector, PULSE (0 V/5 V, 100 μs, 10%

duty cycle).

5. Increase the voltage on the J3 connector, VG1, (nominally

−2.6 V) until the target IDQ is reached (nominally 350 mA).

6. Apply the RF input signal to the RFIN connector of the

ADPA1107-EVALZ.

Take the following steps to power-down:

1. Tur n of f t he RF input sig nal.

2. Set the voltage on the J3 connector, VG1, to −4 V.

3. Turn off the J4 connector, PULSE (set to 0 V).

4. Set the voltage on the J1 connector, VDD, to 0 V.

5. Set the voltage on the J3 connector, VG1, to 0 V.

UG-1962 ADPA1107-EVALZ User Guide

Rev. 0 | Page 10 of 14

PULSE GENERATOR

SYNC OUT PULSE OUT

DRAIN PULSER

BOARD

ADPA1107 EVAL BOARD

RFOUTRFIN ATTENUATOR

INPUT OUTPUT

POWER METER

TRIGGER IN CH 1 CH 2

DIRECTIONAL

COUPLER

INPUT

COUPLED OUTPUT

DIRECTIONAL

COUPLER

INPUT

COUPLED OUTPUT

RF SIGNAL

GENERATOR

TRIGGER IN RF OUT

ATTENUATOR POWER

SENSOR 1

OUTPUTINPUT

50Ω

TERMINATION

INPUT

AMPLIFIER

OUTPUT INPUT

OSCILLOSCOPE

CH 1 CH 3CH 2

VDD AND IDD

MONITORING

TRIGGER

TEKTRONIX

TCPA300

CURRENT

PROBE

TEKTRONIX

TCPA312A

DC SUPPLY

VDD

+28V/3AGND

DC SUPPLY

VGG

0V TO –4V GND

PULSED_VDD

VDD VG1 GNDSENSE PULSE

ATTENUATOR POWER

SENSOR 2

OUTPUTINPUT

26242-005

Figure 5. Setup Block Diagram

Tabla de contenidos

Otros manuales de Placa madre de Analog Devices

Analog Devices

Analog Devices AD6642 Manual de usuario

Analog Devices

Analog Devices ADSP-21161N Manual de usuario

Analog Devices

Analog Devices AD7366 Manual de usuario

Analog Devices

Analog Devices MAX16165 Manual de usuario

Analog Devices

Analog Devices AD8143-EVALZ Manual de usuario

Analog Devices

Analog Devices EVAL-AD5413SDZ Manual de usuario

Analog Devices

Analog Devices AD9272 Manual de usuario

Analog Devices

Analog Devices ADuCM320 Guía rápida de usuario

Analog Devices

Analog Devices ADSP-BF706 EZ-KIT Mini Manual de usuario

Analog Devices

Analog Devices EVAL-AD5142ADBZ Manual de usuario

Analog Devices

Analog Devices SSM2529 Manual de instrucciones

Analog Devices

Analog Devices AD9102 Manual de usuario

Analog Devices

Analog Devices EVAL-ADM8832 Manual de usuario

Analog Devices

Analog Devices UG-213 Manual de usuario

Analog Devices

Analog Devices Linear Technology 2658A Guía de configuración rápida

Analog Devices

Analog Devices AD9574 Guía de inicio rápido

Analog Devices

Analog Devices AD9510 Manual de usuario

Analog Devices

Analog Devices ADuC7024 Manual de usuario

Analog Devices

Analog Devices EVAL-AD5142DBZ Manual de usuario

Analog Devices

Analog Devices ADRF5549-EVALZ Manual de usuario

Analog Devices

Analog Devices EVAL-ADM2482EEB3Z Manual de usuario

Analog Devices

Analog Devices DC1198B-A Guía de configuración rápida

Analog Devices

Analog Devices ADSP-21992 EZ-KIT LITE Guía del usuario

Analog Devices

Analog Devices EVAL-ADF4350EB2Z Manual de usuario

Manuales populares de Placa madre de otras marcas

DFI

DFI SD170 Manual de usuario

ASROCK

ASROCK ROMED8-2T Manual de usuario

Asus

Asus P2L97A Manual de usuario

Winmate

Winmate IC70 Manual de usuario

Asus

Asus MES-B Manual de usuario

Grantech

Grantech SYS8F377VGGA-3OMN Manual de usuario

Telit Wireless Solutions

Telit Wireless Solutions SL869-3DR Manual de usuario

Gigabyte

Gigabyte GA-9IVDT Manual de usuario

Texas Instruments

Texas Instruments ADS8372EVM Manual de usuario

Commell

Commell MS-C73 Manual de usuario

IBT Technologies

IBT Technologies MB860 Manual de usuario

Nvidia

Nvidia TEGRA DG-04927-001_V01 Manual de usuario

Biostar

Biostar M7VIT Bravo Instrucciones de funcionamiento e instalación

Intel

Intel D33217CK Manual de usuario

Asus

Asus F1A55-M LX PLUS R2.0 Manual de usuario

EPC

EPC EPC9147C Manual de usuario

Asus

Asus EX-B760M-V5 D4 Manual de usuario

EPOX

EPOX MU-8KHA0010 Manual de usuario