Alinx AX301 Manual de usuario

FPGA Development Board

AX301

User Manual

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Version Record

Revision

Date

Release By

Description

Rev 1.0

2020-01-01

Rachel Zhou

First Release

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Table of Contents

Version Record.......................................................................................... 2

Part 1: FPGA Development Board Introduction..........................................5

Part 2: Power Supply..................................................................................7

Part 3: FPGA ..............................................................................................8

Part 3.1: JTAG Interface......................................................................9

Part 3.2: FPGA power and GND pins................................................10

Part 4: 50M Active Crystal ........................................................................12

Part 5: SPI Flash ......................................................................................13

Part 6: SDRAM.........................................................................................14

Part 7: EEPROM 24LC04.........................................................................17

Part 8: Real-time clock DS1302 ...............................................................18

Part 9: USB to Serial Port.........................................................................19

Part 10: VGA Interface..............................................................................21

Part 11: SD Card Slot ...............................................................................24

Part 12: LEDs ...........................................................................................26

Part 13: User Keys ...................................................................................27

Part 14: Camera Module interface............................................................28

Part 15: Digital Tube.................................................................................29

Part 16: Buzzer.........................................................................................32

Part 17: Expansion Ports..........................................................................33

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The ALINX AX301 development board is an entry-level product for

ALTERA FPGAs and is primarily targeted at FPGA beginners. AX301 uses

ALTERA's Cyclone IV series chip, the model is EP4CE6F17C8, and it is a

256-pin FBGA package. The configuration of the entire development board is

practical. There are two ALINX standard 40-pin 2.54 pitch expansion ports, a

total of 34 * 2 = 68 IOs. In addition, 5V power, 3.3V power, and multiple GNDs

are also available. It is a very good choice for DIY players. In addition, many

ALINX supporting modules can also be directly connected to the expansion

port of this FPGA development board, such as ADDA module, 4.3 inch LCD

screen, audio module, camera, etc. provide more options. The following is a

detailed introduction to AX301.

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Part 1: FPGA Development Board Introduction

The AX301 development board uses ALTERA's Cyclone IV series FPGA,

the model is EP4CE6F17C8, and a 256-pin FBGA package. The resources of

this FPGA are shown below:

The main parameters as below:

Parameters

Value

Logic elements(LEs)

6272

Embedded memory(Kbits)

270

Embedded 18x18multipliers

Global Phase Locked Loop (PLLs)

Global Clock Networks

Maximum number of available IOs

179

Core voltage

1.15V-1.25V(recommend 1.2V);

Operating temperature

0-85℃

The structure of the entire system is shown in Figure 1-1:

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Through the diagram, we can see the functions that the development

platform can achieve:

USB interface power supply, and realize USB to serial port function

A large-capacity 256Mbit SDRAM can be used as data cache

A 16Mbit SPI FLASH can be used as FPGA configuration file and user

data storage

One camera interface for 5 million OV5640 camera module

One VGA interface, VGA interface is 16bit, can display 65536 colors,

can display color pictures and other information

One piece of RTC real-time clock, equipped with a battery holder, the

battery model is CR1220

One EEPROM 24LC04 with IIC interface

4 red LEDs, can realize the function of running light

4 buttons, 1 reset button, 3 user button

50M active crystal on board, providing stable clock source for

development board

Two 40-pin ALINX standard expansion ports (2.54mm pitch), of which 34

IO ports, one 5V power supply, two 3.3V power supplies, and three

GND. Two expansion modules can be connected at the same time,

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such as 4.3-inch TFT module and AD / DA module

The JTAG port is reserved for debugging and program curing of the

FPGA.

1 Micro SD card slot, support SPI mode One 6-digit digital tube, can

display 6 digits dynamically

Part 2: Power Supply

The AX301 development board is powered by USB. Use a MINI USB

cable to connect the development board to the computer's USB and press the

power switch to power the development board. The power supply design

diagram of the development board is as Figure 2-1:

Figure 2-1: Power Supply Schematic

The development board is powered by USB and generates three power

sources: + 3.3V, + 2.5V, and + 1.2V through three LDO power chips to meet the

bank voltage and core voltage of the FPGA.

In the PCB design, a 4-layer PCB is used, and a separate power supply

layer and GND layer are reserved, so that the power supply of the entire

development board has very good stability. Test points for each power supply

are reserved on the PCB so that the user can confirm the voltage on the board.

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Figure 2-2: Test Points for Power supply on the Board

Part 3: FPGA

The FPGA model used by the AX301 development board is

EP4CE6F17C8, which belongs to ALTERA's Cyclone IV. This model is a BGA

package with 256 pins. The definition of FPGA pins is explained again. Many

people use FPGAs that are non-BGA packages, such as 144-pin, 208-pin

FPGA chips. Their pin definitions are composed of numbers, such as 1 to 144,

1 to 208, and so on. When we use a BGA packaged chip, the pin names

become letters + numbers, such as E3, G3, etc. Therefore, when reading the

schematic diagram, the letters + numbers in this form represent the FPGA Pin.

Having said this, let's look at the functions of various parts related to FPGA.

Figure 3-1 is the FPGA chip used in the development board.

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Figure 3-1: The FPGA chip on the Board

Part 3.1: JTAG Interface

First of all, let's talk about the configuration and debugging interface of

FPGA: JTAG interface. The function of the JTAG interface is to download the

compiled program (.sof) into the FPGA or the FLASH configuration program

(.jic) to the SPI FLASH. After the sof file is downloaded to the FPGA, it will be

lost after power failure. You need to power on and download again. At this time,

we can convert the sof file into a jic file through the Quartus software. After

downloading the jic file to the development board's FLASH through JTAG, it will

not be lost after power off, and the FPGA will read the jic configuration file in

FLASH and run after power on again.

Figure 3-2 is the schematic part of the JTAG port, which involves the four

signals TCK, TDO, TMS, TDI. These four signals are directly derived from the

FPGA pins, and each signal has a diode overvoltage protection circuit on the

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development board.

Figure 3-2: The JTAG port schematic

The JTAG interface uses a 10-pin 2.54mm standard connector. Figure 3-3

is the JTAG interface on the development board.

Figure 3-3: The JTAG port on the FPGA Board

Part 3.2: FPGA power and GND pins

Next, let's talk about the power pins of the FPGA. It includes the power

supply pin, core voltage pin, analog voltage and phase-locked loop power

supply pin of each bank. VCCINT is the FPGA core power supply pin, which is

connected to 1.2V. VCCIO is the power supply voltage of each bank of the

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